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      VLSI Verification Engineer- Junior Position
      Graduate
      alt Herzilya
      Job Description:
      Are you highly passionate with interest in Coverage driven verification, advanced interpretation to the UVM methodology while working in multi-platform verification environment?
      Then you belong with us in our growing verification team!
      We are developing state of the art DSP ASIC projects in A.I, Vision, Wireless and Base-stations area. The VLSI verification team is responsible producing a fully verified IP with extra ordinary challenges, working on Functional, Formal and Emulation combined environment.
      As part of this position you will be a part of the FIP verification team, you will work on a full state of the art verification flow from architecture definition, through verification strategy, environment micro ARCH, test plan, functional coverage plan and up to advanced verification sign off process.
      Requirments: 
      • B.Sc. / M.Sc. in Electrical Engineering from a leading institute
      • 0-2 years’ experience as VLSI verification developer with high expertise in developing UVM based verification environments
      • In-depth knowledge of SV-UVM, Specman and C/C++
      • Self-motivated and self-directed, proactive
      • Ability to achieve results in a fast moving, agile flow and dynamic environment, both locally and across the organization
      • Ability to troubleshoot and analyze complex problems
      • Great communication skills
      • Team player
      NO. 2471
      apply now

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